Welcome to the documentation of B-ASIC!

B-ASIC is a Python library for the design and implementation of static algorithms that simplifies the writing of efficient RTL code targeting both standard-cell and FPGA technologies.

The goal is to have a working design path from algorithm down to an HDL-description of a custom architecture. Once it becomes a bit more mature, we expect to make it available on PyPI and conda-forge such that it will become easier to access.

To install B-ASIC, the currently preferred way is:

git clone https://gitlab.liu.se/da/B-ASIC.git
cd B-ASIC
python -m pip install -e .

This will install in editable mode, which is beneficial since you then easily can pull new changes without having to reinstall it. It also makes it easy to contribute any improvements.

In addition to the dependencies that are automatically installed, you will also need a Qt-binding, but you are free to choose between PyQt6 and PySide6. See https://gitlab.liu.se/da/B-ASIC for more info.

If you use B-ASIC in a publication, please acknowledge it. Later on there will be a citation provided, but right now, please refer to this documentation or the repository. We will also maintain a list of publications that have used B-ASIC.

Indices and tables

• Index

• Module Index

• Search Page

Table of Contents

• API
• SFG GUI
• Scheduler GUI
• GUI Utilities
• Code generation
• Examples
• Research functions

Development

B-ASIC is developed at the Division of Electronics and Computer Engineering, Linköping University, Sweden, where it was initiated by Oscar Gustafsson.

The development of B-ASIC happens at https://gitlab.liu.se/da/B-ASIC.